BERT 19881 _ 400G High Speed Bit Error Rate Tester
PRECISE 400G high-speed error test system is a high-speed signal error performance analyzer for multi-channel PAM4 and NRZ applications. It supports up to 8x56Gb/s PAM4 signal test and 10G~28Gb/s NRZ signal test. The equipment includes 8-channel PPG. , 8-channel ED transceiver signals can work simultaneously or independently. A single channel supports up to 56Gb/s PAM4 signals and supports multiple types of pattern test solutions.
The transmitter includes a multi-level pre-emphasis adjustment mode, which can perform functions such as eye shape adjustment for PAM4 signals. The receiver includes 0~9dB CTLE equalization adjustment, supports FFE, DFE and other equalization functions, supports FEC function, and can perform PRBS error checking and Modified, KP4/KR4 FEC protocol, with SNR monitoring function.
It can be widely used in optical testing scenarios such as 100G modules, 200G modules, 400G modules, AOC, optical devices and subsystem R&D and production, etc. It can provide the best solution for automated production testing of high-speed optical transceiver modules.
Features
- Supports up to 8x56GBaud, and each channel can be independently configured as NRZ or PAM4.
- Support PRBS 7 / 9 / 11 / 13 / 15 / 16 / 23 / 31, PRBS7~31Q
- Supports SSPRQ / JP03A / JP03B / LIN / square wave / custom pattern, etc. (transmitter).
- The trigger signal supports frequency division output (frequency division 4 ~ division 128).
- Supports pre-emphasis and de-emphasis modulation at the transmitter in 3rd-order/7th-order mode.
- The receiving end supports equalization function settings, supports 64-order CTLE receiving end equalization modulation, and supports FFE, DFE and other adjustment modes.
- Support switching input and output polarity.
- Supports signal output amplitude adjustment.
- Supports Combine and MSB_LSB encoding mode switching.
- Supports KP4/KR4 FEC protocol testing.
- SNR signal monitoring.
Technical Specifications
Rate
NRZ:9.95 ~ 14.025Gbps | NRZ:20 ~ 28Gbps PAM:20 ~ 28GBaud |
PPG Side
Item Spec. Pattern (Prbs) PRBS7/9/11/13/15/16/23/31、PRBS13Q、PRBS31Q、SSPRQ、JP03B、
CID jitter tolerance pattern、Transmitter linearity test pattern、User modeElectrical Emission Channel Amplitude (mV) < 1200 ED Side
Item Spec. Pattern (Prbs) PRBS7/9/11/13/15/16/23/31、PRBS13Q、PRBS31Q Receive Level Sensitivity (mV) >40 Equalization Function CTLE、FFE、DFE Input and Output Impedance (Ω) Single-side 50 ; Differential 100 Trigger Out
Item Spec. Trigger Clock Frequency Ratio frequency division External Clock Input Amplitude (mV) 600 ~ 1600mV External Clock Input Duty Ratio (%) 40~60
Typical Data
Electrical Signal Eye Pattern
Optional Items
Interface
Item Spec. #1 RS232 #2 RS232、GPIB #3 RS232、 LAN